Electronic and Electrical Engineering

Available courses:

Electrical Engineering – B.Eng or B.Eng/M.Eng

Electronic Engineering – B.Eng or B.Eng/M.Eng

Electronic and Communications Engineering – B.Eng or B.Eng/M.Eng

Course description

       Electronics engineers are involved in a wide variety of technology ranging from tiny integrated circuits to worldwide communication systems. These engineers are responsible for designing. developing, testing as well as supervising the production of electronic-based equipments. Therefore, as an electronic engineer, there are great opportunities to develop your career in the field of broadcast and telecommunication systems, electrical systems, signal processing and industrial control systems. Additionally, you may also work in fields which relate to computers and IT.

Laboratories

Faculties

Prof.Dr.Jirayuth Mahattanakul

  • Ph.D.: Electrical Engineering (Analog IC Design),
    Imperial College of Science, Technology and Medicine, UK
  • M.Sc.: Electrical Engineering (Electronics), Florida Institute of Technology, USA
  • B.Eng.: Electrical Engineering (Electronics), King Mongkut’s Institute of Technology Ladkrabang, THAILAND
  • E-mail : jirayut@mut.ac.th 

AWARDS

  • The 21st Electrical Engineering Conference (EECON21) Best paper

RESEARCH

  • Analog circuit designs
  • CMOS IC design techniques
  • Companding technique/log-square root domain circuits
  • Gm-C technique for high performance continuous-time filters

JOURNAL PAPERS

  • T. Choogorn and J. Mahattanakul, “Relationship between common-mode rejection and differential-mode distortion in fully differential Gm-C filters,” IET Circuits and Devices Syst., vol. 5, no. 6, pp. 518-526, 2011.
  • J. Mahattanakul, P. Khumsat, and W. Surakampontorn, “Ladder-simulation elliptic bandpass active-RC filter structure employing identical resistors,” IET Circuits, Devices and Systems, vol. 3, pp. 187-196, Aug 2009.
  • J. Mahattanakul, P. Khumsat, and W. Surakampontorn, “Selection of the common-mode feedback network of the fully-differential Gm-C filters,” IET Circuits, Devices and Systems, vol. 3, pp. 49-56, Feb 2009.
  • J. Mahattanakul and P. Khumsat, “Structure of complex elliptic Gm-C filters suitable for fully differential implementation,” IET Circuits and Devices Syst., vol. 1, no. 4, pp. 275-282, 2007.
  • J. Mahattanakul, “The Effect of I/Q Imbalance and Complex Filter Component Mismatch in Low-IF Receivers,” IEEE Transactions on Circuits and Systems–I, vol. 53, pp. 247 – 253, February 2006.
  • J. Mahattanakul, “The effects of mismatch in Gm-C polyphase filters,” IEEE Transactions on Circuits and Systems–II, vol. 52, pp. 410-414, July 2005.
  • J. Mahattanakul, “Design Procedure for Two-Stage CMOS Operational Amplifiers Employing Current Buffer,” IEEE Transactions on Circuits and Systems–II, vol. 52, pp. 766-770, November 2005.
  • J. Mahattanakul and J. Chutichatuporn, “Design Procedure for Two-Stage CMOS Opamp With Flexible Noise-Power Balancing Scheme,” IEEE Transactions on Circuits and Systems–I, vol. 52, pp. 1508-1514, Aug 2005.
  • J. Mahattanakul, “Logarithmic data converter suitable for hearing aid applications,” IEE Electronics Letters, vol. 41, pp. 394 – 395, March 2005.
  • J. Mahattanakul and C. Toumazou, “Instantaneous Companding Current-Mode Oscillator Based on Class AB Transconductor,” Analog Integrated Circuits and Signal Processing, vol. 23, April 2000.
  • A. Worapishet, J. Mahattanakul and C. Toumazou, “A very high frequency transistor-only linear tuneable companding current-mode integrator,” Analog Integrated Circuits and Signal Processing, vol. 22, pp. 81 – 87, March 2000.
  • J. Mahattanakul and C. Toumazou, “Modular log-domain filters based upon linear Gm-C filter synthesis,” IEEE Transaction on Circuits and Systems -I: Theory and Applications, vol. 46, pp. 1421-1430, Dec 1999.
  • J. Mahattanakul and C. Toumazou, “Current-mode Versus Voltage-mode Gm-C biquad filters, What the theory says: -,” IEEE Transactions on Circuits and Systems – II: Analog and Digital Signal Processing, vol 45, pp. 173-186, Feb 1998.
  • J. Mahattanakul and C. Toumazou, “Tunable low-distortion CMOS/BiCMOS transconductance amplifier,” IEE Electronics Letters, vol. 34, pp. 175-176, Jan 1998.
  • J. Mahattanakul and C. Toumazou, “Modular log-domain filters,” IEE Electronics Letters, vol. 33, pp. 1130-1131, June 1997.
  • J. Mahattanakul and C. Toumazou, “Instantaneous companding and expressing: A dual approach to linear integrator synthesis”, IEE Electronics Letters, vol 33, pp. 4-5, Jan 1997.
  • J. Mahattanakul, C. Toumazou and S. Pookaiyaudom, “Low-distortion current-mode companding integrator operating at BJT’s ft,” IEE Electronics Letters, vol 32, pp. 2019-2021, Oct. 1996.
  • J. Mahattanakul and C. Toumazou, “Independent control of transconductance gain and input linear range in a MOS linear transconductance amplifier,” IEE Electronics Letters, vol 32, pp. 1629-1630, August 1996.
  • J. Mahattanakul and C. Toumazou, “A theoretical study of the stability of high frequency current feedback op-amp integrators,” IEEE Transactions on Circuits and Systems-I: Theory and Applications, vol 43, pp. 2-12, Jan 1996.

CONFERENCE PAPERS

  • T. Choogorn and J. Mahattanakul, “Distortion Analysis of the Alternative Doubly-Terminated Ladder Fully-Differential Gm-C Filters,” in Proc. IEEE 2012 International Symposium on Circuits and Systems, pp. 1179-1182, 2012.
  • C. Upathamkeukool, A. Jiraseree-amornkun, and J. Mahattanakul, “A compensation technique for compact low-voltage low-power active-RC filters,” in Proc. IEEE 2010 International Symposium on Circuits and Systems, June 2010, Paris, France, pp. 3633–3636.
  • T. Choogorn, J. Mahattanakul and A. Worapishet, “Analysis of the common-mode induced differential-mode distortion in Gm-C filters”, in Proc. IEEE 2010 International Symposium on Circuits and Systems, June 2010, Paris, France, pp. 3621–3624.
  • C. Sawigun and J. Mahattanakul, “A 1.5-V wide input range, high bandwidth CMOS four-quadrant analog multiplier,” in Proc. IEEE 2008 International Symposium on Circuits and Systems, May 2008, Seattle, USA, pp. 2318–2321.
  • C. Sawigun, J. Mahattanakul, A. Demosthenous, and D. Pal, “A low-power CMOS analog voltage buffer using compact adaptive biasing,” in Proc. European Conference on Circuit Theory and Design, (ECCTD)” 2007.
  • C. Sawigun and J. Mahattanakul, “A compact high current efficiency low-voltage MOS transconductor with nearly constant input voltage range,” in Proc. 2007 IEEE International Symposium on Circuits and Systems, New Orleans, USA, pp. 221–224.
  • C. Sawigun and J. Mahattanakul, “A low-voltage CMOS linear transconductor suitable for analog multiplier application,” in Proc. IEEE 2006 International Symposium on Circuits and Systems, Island of Kos, Greece, Sep 2006, pp. 1543-1546.
  • J. Mahattanakul and Y.Piputtawutchai, “Fully-differential Log-domain Integrator with Orthogonal Common-mode and Differential-Mode Responses,” in Proc. IEEE 2003 International Symposium on Circuits and Systems, Bangkok, 2003.
  • C. Boonyakate and J. Mahattanakul, “A Novel Method for Harmonic Analysis,” in Proc. IEEE 2001 International on Circuits and Systems, Sydney, 2001.
  • J. Mahattanakul, S. Pookaiyaudom and C. Toumazou, “Understanding Wilson Current Mirror via Negative Feeback Approach,” in Proc. IEEE 2001 International on Circuits and Systems, Sydney, 2001.
  • J. Mahattanakul and C. Toumazou, “Current-mode approaches for tunable bipolar transconductors and multipliers,” in Proc. 1997 European Conference on Circuit Theory and Design (ECCTD’97), Budapest, Hungary, 1997, pp. 955-958.
  • J. Mahattanakul and C. Toumazou, “A non-linear design approach for high frequency linear integrators,” in Proc. IEEE 1997 International on Circuits and Systems, Hong Kong, 1997, pp. 485-488.
  • J. Mahattanakul and C. Toumazou, “DC-stable CCII-based instantaneous companding integrator,” in Proc. IEEE 1997 International on Circuits and Systems, pp. 821-824, Hong Kong, 1997.
  • J. Mahattanakul and S. Pookaiyaudom, “A 3.3 Volt high-frequency capacitorless electronically-tunable log-domain oscillator,” in Proc. IEEE 1995 International Symposium on Circuits and Systems, pp. 829-832, Seattle, 1995.

Prof.Dr.Apisak Worapishet

  • Ph.D.: Electrical Engineering (Analogue IC design),
    Imperial College of Science, Technology and Medicine, UK
  • M.Sc.: Engineering Science in Electrical Engineering (Analogue IC design),The University of New South Wales, AUSTRALIA
  • B.Eng.: Engineering (1st-class Honors/Electronics), King Mongkut’s Institute of Technology Ladkrabang, THAILAND

Awards

  • 2009– Recipient of 2009 British Council Research Exchange Program.
  • 2007– Outstanding Academic Staff Award, Association of Private Higher Education Institution of Thailand.
  • 2004– Best paper award (in telecommunication), National Electrical Engineering Conference(EECON’27).
  • 1998– Best paper award (in electronics), The 21st Electrical Engineering Conference (EECON21).

Professional Experiences

  • 2005 to present : ASSOCIATE PROFESSOR, Department of Telecommunication, Mahanakorn University of Technology (MUT), Bangkok, THAILAND.
  • 2004 to present : ASSISTANT PRESIDENT (RESEACH AFFAIR), Mahanakorn University of Technology (MUT), Bangkok, THAILAND. Assist president and vice president to oversee research affairs at MUT
  • 2002 to present : ANALOUGE SIGNAL PROCESSING TECHNICAL COMMITEE, IEEE Circuits and Systems (CAS) Society Arrange peer reviews for papers submitted for consideration at IEEE International Symposium on Circuits and Systems (ISCAS) on analogue and signal processing tracks, and serve as a reviewer for manuscripts submitted to IEEE Transactions on Circuits and Systems – I and II.
  • 2002 to present : ENGINEERING CONSUTANT, Smartrac Technology (THAILAND), Ayutthaya, THAILAND.
    1) Designed and optimised reader antennas for characterising resonant frequencies and Q-factors of various types of high frequency RFID transponders with enhanced accuracy.
    2) Develop RFID training courses.
  • 2001 to present : DIRECTOR, Mahanakorn Microelectronics Research Center (MMRC), Mahanakorn University of Technology (MUT), Bangkok, THAILAND. Initiate and oversee researches conducted at MMRC. (See publication list for research highlights)
  • 2001 to present : COMMITTEE MEMBER (ACTIVITY CHAIR), IEEE Circuits and Systems (CAS) Society, Thailand Chapter Arrange local activities such as workshops and seminars for Circuits and Systems Society, IEEE Thailand Chapter.
  • 1991 to present : LECTURER in Telecommunication Department Mahanakorn University of Technology (MUT), Bangkok, THAILAND. Responsible subjects include Electromagnetics, Analogue IC design, Signal and systems, RF electronics, Communication electronics etc.
  • 2006 to 2008 : ENGINEERING CONSUTANT, Advanced ID Co.Ltd. , Chiangmai, THAILAND. Design and optimise antennas and transceivers for various types of UHF RFID readers and transponders.
  • 2002 to 2005 : INVITED RESEARCH CONSUTANT, Thailand IC design Incubator (TIDI), National Electronics and Computer Technology Centre (NECTEC), Bangkok, THAILAND.
    1) Designed and characterised a 13.56MHz read-only RFID system.
    2) Conducted research on the design and implementation of 2.4GHz analogue phase-locked loop (APLL).

Research Area

  • Low-voltage low-power switched-current techniques
  • Low-voltage sub-threshold and switched MOS analogue techniques
  • Biomedical electronics
  • Microwave and millimeter wave RF CMOS integrated circuits and systems
  • RFID circuits and systems

Publication List International Transaction and Journal Papers
(2005-2010)

  1. A. Worapishet, A. Demosthenous and X, Liu, “A CMOS Instrumentation Amplifier With 90-dB CMRR at 2-MHz Using Capacitive Neutralization: Analysis, Design Considerations and Implementation,” IEEE Transactions on Circuits and Systems – I: Regular Paper.
  2. K. Srisathit, A. Worapishet and W. Surakampontorn, “Design of Triple-Mode Ring Resonator for Wideband Microstrip Bandpass Filters,” IEEE Transactions on Microwave Theory and Techniques, vol. 58, no. 11, pp. 2867-2877, November 2010.
  3. A. Worapishet and Tanee Demeechai, “Accurate Signal-to-Noise Analysis of Derivative and Quadrature Differential FM Discriminators Based on Multi-Sinusoidal AWGN Representation,” IEICE Transactions on Fundamentals, Communications and Computer Sciences, vol. E93A, no.10, pp. 1755-1764, October 2010.
  4. A. Worapishet, I. Roopkom, W. Surakampontorn, “Theory and bandwidth enhancement of cascaded double-stage distributed amplifiers,” IEEE Transactions on Circuits and Systems–I: Regular Paper, vol. 57, no. 4, pp. 759-772, April 2010.
  5. P. Potipantong, P. Sirisuk, S. Oraintara, A. Worapishet, “FPGA implementation of highly modular fast universal discrete transforms,” IEICE Transactions on Electronics, vol. E92C, no.4, pp. 570-586, April 2009.
  6. A. Worapishet, P. Khumsat, “Analysis and design of Sub-threshold R-MOSFET tunable resistor”, IEICE Transactions on Electronics, vol. E92C, no.1, pp. 178-182, January 2009.
  7. P. Khumsat, A. Worapishet, “Double-capacitor technique for wide frequency range phase compensation in Gm-C and MOSFET-C filters,” IEICE Transactions on Electronics, vol. E92C, no.1, pp. 135-143, January 2009.
  8. A. Worapishet, J. B. Hughes. “Performance enhancement of switched-current technique using subthreshold MOS operation,” IEEE Transactions on Circuits and Systems–I: Regular Paper, vol.55, no.11, pp. 3582-3592, December 2008.
  9. A. Jiraseree-amornkun, A. Worapishet, E. Klumperink, B. Nauta, W. Surakampontorn, “Theoretical analysis of highly linear tunable filters using switched-resistor techniques,” IEEE Transactions on Circuits and Systems–I: Regular Paper, vol. 55, no.11, pp.3641-3654, December 2008.
  10. P. Khumsat, A. Worapishet, “Two-stage feedforward class-AB CMOS OTA for low-Voltage filtering applications,” IEICE Transaction on Electronics, vol. E90-C, no. 12, pp. 2293 – 2296, December 2007.
  11. A. Worapishet, P. Khumsat, “Sub-threshold R-MOSFET tunable resistor technique,” Electronics Letters, vol. 43, Issue 7, pp. 390–392, March 2007.
  12. A. Worapishet, I. Roopkom, W. Surakampontorn, “Performance analysis and design of tripleresonance interstage peaking for wide-band cascaded CMOS amplifiers,” IEEE Transactions on Circuits and Systems–I: Regular Paper, vol. 54, pp. 1189–1203, June 2007.
  13. P. Khumsat, A. Worapishet, “Compact two-stage class AB CMOS OTA for low voltage filtering applications,” IEICE Transaction on Electronics, vol. E90-C, no. 2, pp. 543–546, January 2007.
  14. A. Worapishet, R. Sitdhikorn, A. Spencer, J. B. Hughes, “A multirate switched-current filter using class-AB cascoded memory,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 53, Issue 11, pp. 1323 – 1327, Nov. 2006.
  15. A. Worapishet, “Extended phase noise performance in mutual negative resistance CMOS LC oscillator for low supply voltages,” IEICE Transaction on Electronics, vol. E89-C, no. 6, pp. 732 – 738, June 2006.
  16. A. Worapishet, K. Moolpho, J. Ngarmnil, “Efficient mismatch-insensitive track-and-hold circuit using low-voltage floating-gate MOS transistors,” IEICE Transaction on Electronics, vol. E88-C, no. 6, pp. 1149 – 1153, June 2005

Assoc.Prof.Dr.Peerapol Yuvapoositanon

  • Ph.D.: Digital Signal Processing for Wireless Communications,
    Imperial College of Science, Technology and Medicine, UK
  • M.Sc.: Engineering and Physical Science in Medicine, Imperial College of Science, Technology and Medicine,UK
  • B.Eng.: Electronics : King Mongkut’s Institute of Technology Ladkrabang, THAILAND
  • E- mail : peerapol@mut.ac.th 

AWARDS

  • Best Presentation Award in Signal Processing For Communications
    P.Yuvapoositanon, An Adaptive Step-Size LMS Chip Equaliser for Long-Code Downlink CDMA Systems, First Electrical Engineering/ Electronics, Computer, Telecommunications and Information Technology (ECTI-2004) Annual Conference, Chonburi, May 2004.
  • Best Paper Award in Digital Signal Processing
    P. Yuvapoositanon, Steady-State Performance of a Blind Adaptive RAKE Receiver for DS-CDMA, 26th Electrical Engineering Conference (EECON-26) , Petchaburi, November 2003.
  • Best Paper Award in Digital Signal Processing
    P. Yuvapoositanon and Jonathon A. Chambers, An Adaptive Blind DS-CDMA Receiver, 22nd Electrical Engineering Conference (EECON-22), Bangkok, November 1999

PUBLICATIONS

  • S.Sitjongsataporn and P.Yuvapoositanon, “Variable Tap-length RLS-based Per-tone Equalisation for DMT-based systems”, in Proc.33rd Electrical Engineering Conference (EECON-33), Chiang Mai, Thailand, pp. 1333-1336, Dec. 2010. 4
  • S.Sitjongsataporn and P.Yuvapoositanon, “Order Statistic LMS-based Per-Tone Equalisation with Variable Data-Reuse Factors”, in Proc.33rd Electrical Engineering Conference (EECON-33), Chiang Mai, Thailand, pp. 1337-1340, Dec. 2010.
  • S.Sitjongsataporn and P.Yuvapoositanon, “Low Complexity Adaptive Step-Size Filtered Gradient-based Per-Tone DMT Equalisation”, in Proc.IEEE International Symposium on Circuits and Systems (ISCAS), Paris, France, pp. 2526-2529, May 2010.
  • S.Sitjongsataporn and P.Yuvapoositanon, “A Set-Membership Mixed-Tone Binormalised LMS-based Per-Tone DMT Equalisation”, in Proc.IEEE International Symposium on Communications, Control and Signal Processing (ISCCSP), Limassol, Cyprus, Mar. 2010.
  • S.Sitjongsataporn and P. Yuvapoositanon, “Bit Rate Maximising Per-Tone Equalisation with Adaptive Implementation for DMT-Based Systems,” EURASIP Journal on Advances in Signal Processing, vol. 2009, Article ID 380560, 13 pages, 2009. doi:10.1155/2009/380560.
  • S.Sitjongsataporn and P.Yuvapoositanon, “Mixed-Tone Normalised Orthogonal Gradient Adaptive Per-Tone DMT Equalisation”, in Proc.IEEE International Conference on Electrical Engineering / Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), Pattaya, Thailand, pp. 1151-1154, May 2009.
  • S.Sitjongsataporn and P.Yuvapoositanon, “A Set-Membership Binormalised LMS-based Algorithm for Per-Tone DMT Equalisation”, in Proc.32nd Electrical Engineering Conference (EECON-32), Prachinburi, Thailand, DS-028, Oct. 2009.
  • S.Sitjongsataporn and P.Yuvapoositanon, “A Mixed-Tone RLS Algorithm with Orthogonal Projection for Per-Tone DMT Equalisation”, in Proc.IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Knoxville, Tennessee, USA, pp. 942-945, Aug. 2008.
  • S.Sitjongsataporn and P.Yuvapoositanon, “Recursive Levenberg-Marquardt Per-Tone Equalisation for Discrete Multitone Systems”, in Proc.IEEE International Symposium on Communications, Control and Signal Processing (ISCCSP), St.Julians, Malta, pp. 1062-1066, Mar. 2008.
  • S.Sitjongsataporn and P.Yuvapoositanon, “Adaptive Forgetting-factor Gauss-Newton inverse QR-RLS Per-Tone Equalisation for Discrete Multitone Systems”, in Proc.IEEE International Conference on Electrical Engineering/ Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), Krabi, Thailand, pp. 561-564, May 2008. 5
  • S.Sitjongsataporn and P.Yuvapoositanon, “An inverse QR Adaptive Forgetting-factor RLS Algorithm for Per-Tone Equalisation”, in Proc.31st Electrical Engineering Conference (EECON-31), Nakorn-nayok, Thailand, pp.1097-1100, Oct. 2008.
  • S. Sitjongsataporn and P. Yuvapoositanon, “An Adaptive Step-size Order Statistic Time Domain Equaliser for Discrete Multitone Systems”, in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS 2007), 27-30 May 2007, Page(s):1333 – 1336.
  • S. Phrompichai and P. Yuvapoositanon, “A semiblind receiver based upon multiple constrained subspace MUD for long-code downlink multirate DS-CDMA systems”, in Proceedings of 2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006), 21- 24 May 2006, Page(s): 409-412.
  • S.Sitjongsataporn and P.Yuvapoositanon, “A Stochastic Gradient-based Time-Domain Equaliser for Discrete Multitone Systems”, in Proc.29th Electrical Engineering Conference (EECON-29), Chonburi, Thailand, pp.1001-1004, Oct. 2006.
  • S. Phrompichai and P. Yuvapoositanon, “ A semiblind receiver for space-time block-coded downlink multirate DS-CDMA systems”, in Proceedings of 2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006 Page(s): 401-404.
  • Samphan Phrompichai, Peerapol Yuvapoositanon, and Phaophak Sirisuk, “Subspacebased Interference Suppression Technique for Long-Code Downlink CDMA Adaptive Receiver”, in IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A, No. 3, March 2005, pp. 676-684.
  • Samphan Phrompichai, Peerapol Yuvapoositanon, Phaophak Sirisuk, “Subspace-based interference suppression technique for long-code downlink CDMA adaptive receiver”, in Proceedings of the 2004 47th Midwest Symposium on Circuits and Systems (MWSCAS ’04), volume 2, 25-28 July 2004 Page(s): II-41 -II-44 vol.2.
  • P. Yuvapoositanon and J.A. Chambers, “Convergence behaviours of an adaptive step-size constant modulus algorithm for DS-CDMA receivers”, in Proceedings of the 2003 International Symposium on Circuits and Systems (ISCAS ’03), Volume 3, 25-28 May 2003 Page(s):III-40 -III-43 vol.3.
  • P. Yuvapoositanon and J.A. Chambers, “An adaptive step-size code-constrained minimum output energy receiver for nonstationary CDMA channels”, in Proceedings of the 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP ’03), Volume 4, 6-10 April 2003 Page(s):IV- 465-8 vol.4 . 6
  • P. Yuvapoositanon and J. A. Chambers, “Adaptive Step-Size Constant Modulus Algorithm for DS-CDMA Receviers in Nonstationary Environments”, Signal Processing, vol. 82, pp. 311-315, Feb. 2002.
  • P. Yuvapoositanon and J. A. Chambers, “An Adaptive Blind CMOE-CMA Receiver for Asynchronous DS-CDMA Systems”, in Mathematics for Signal Processing V, J. G. McWhirter and I. K. Proudler Eds., Oxford University Press, UK, 2002.
  • P. Yuvapoositanon and J. A. Chambers, “A Mixed-cost Blind Adaptive Receiver for DSCDMA”, in Proc. IEEE Workshop on Stat. Signal Processing, Singapore, pp. 94- 97, Aug. 2001.
  • P. Yuvapoositanon and J. A. Chambers, “A CMOE-CMA RAKE Receiver Structure for Near- Far Frequency-Selective Fading CDMA Channels, in Proc. IEEE Symp. On Signal Processing and its Applications, Kuala Lumpur, Malaysia, pp. 418-421, Aug. 2001.
  • P. Yuvapoositanon and J. A. Chambers, “A Blind Adaptive Receiver for Asynchronous DS- CDMA Receiver”, in Proc. 23rd Electrical Engineering
  • Conf., Chiang Mai, Thailand, pp. 541-544, Nov. 2000.
  • P. Yuvapoositanon and J. A. Chambers, “An Adaptive Blind DS-CDMA Receiver”, in Proc. 22nd Electrical Engineering Conf., Bangkok, Thailand, pp. 135-138, Nov. 1999.

INVITED ACTIVITIES

  • Invited Lecturer, “Blind signal processing”, for Electrical Engineering Graduate Programme, Graduate School of Biomedical Engineering, Mahidol University, 2 July 2008.
  • M.Eng Thesis External Examiner, “Human Identification System based Frequency Domain of ECG Signal”, King Mongkut’s Institute of Technology Ladkrabang, 24 July 2007.
  • Invited Lecturer, “Data and Computer Network”, Aeornautical Radio of Thailand Ltd., 18-20 July 2007
  • Invited Lecturer, “Channel Equalization using Adaptive Filters”, in Statistical Digital Signal Processing course for Electrical Engineering Graduate Programme, Graduate School, Chulalongkorn University, 19 January 2005.

EXPERIENCE

  • 2006-2010 : Director : The Electrical Engineering Graduate Programme ,The Graduate School Mahanakorn University of Technology, Bangkok
  • 2005-present : Consultant & Project Management : Scada Automation, Co., Ltd., Bangkok
  • 2004-2004 : Associate Dean : Faculty of Engineering, Mahanakorn University of Technology, Bangkok
  • 2003-2004 : Head of Department : Department of Electronic Engineering, Mahanakorn University of Technology, Bangkok
  • 1992-present : Lecturer : Department of Electronic Engineering, Mahanakorn University of Technology, Bangkok
  • 1991-1992 : Research and Development Engineer : Takacom Corporation, Gifu, Japan
  • 1991-1991 : Field Engineer : Supreme Products, Co., Ltd., Bangkok

RESEARCH INTERESTS

  • Adaptive Signal Processing in Communications
  • Signal processing for Orthogonal Frequency Division Multiple Access (OFDM) receiver systems
  • Signal processing for Multicarrier Code Division Multiple Access (MC-CDMA) receiver systems.
  • Signal processing for Discrete Multitone (DMT) receiver systems

  • Particle Filtering (PF)
  • Robot Localisation
  • Parameter Estimation

  • Feature extraction and Pattern Recognition Applications
  • Face Recognition

RESEARCH GRANT

  • New Researchers Grant from the Thailand Research Fund (TRF)
  • P.Yuvapoositanon, TRG4680016 Adaptive Multirate Wideband Code Division Multiple
  • Access Receivers for Third Generation Mobile Systems, 2003-2005.
  • Mentor: Prof. Jonathon A. Chambers, Cardiff School of Engineering, UK

Asst.Prof.Dr.Theerayod Wiangtong

  • Ph.D.: Electrical Engineering (Digital System Design),
    Imperial College of Science, Technology and Medicine, UK
  • M.Sc.: Satellite Communication Engineering, University of Surrey, UK
  • B.Eng.: Electrical Engineering (Electronics), King Mongkut’s Institute of Technology Ladkrabang, THAILAND
  • E-mail : theerayo@mut.ac.th

Journal/Magazine

  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “Hardware/software Codesign for Data-dominated DSP Applications,” IEEE Signal Processing Magazine: Special issue on Hardware/Software Co-design for DSP, vol.22, no.3, May 2005.
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “Comparing Three Heuristic Search Methods for Functional Partitioning in Hardware-Software Codesign,” International Journal of Embedded Design and Automation, Kluwer academic publishers, 2000

Book/Book chapter

  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “A Unified Codesign Run-time Environment for the UltraSONIC Reconfigurable Computer,” Chapter 7: New Algorithms, Architectures and Applications for Reconfigurable Computing, Springer, Edited by P.Lysaght and W.Rosenstial, May 2005
  • HDL chip design

Conference papers

  • Sethakarn Prongnuch and Theerayod Wiangtong, “Implementation and Evaluation of Ethernet Interface in Co-design Reconfiguration System,” Electrical Engineering Conference (EECON-35), 2012.
  • Theerayod Wiangtong, Prayoon Juangjun, “Temperature and Humidity Controller for Closed Systems,” ECTI-CARD, 2012.
  • Theerayod Wiangtong and Sethakarn Prongnuch, “Computer Vision Framework for Object Monitoring,” International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2012.
  • Sirisak Leepocanon, Theerayod Wiangtong, “Object Tracking and Motion Capturing in Hardware-Accelerated Multi-Camera System,” International Workshop on Applied Reconfigurable Computing (ARC2009), Karlsrule, Germany, March 2009.
  • Panan Potipantong, Soontorn Oriantara, Phaophak Sirisuk, Theerayod Wiangtong, Apisak Worapishet, “The Unified Discrete Fourier-Hartley Transforms Processor,” International Symposium on Communication and Information Technologies (ISCIT), 2006.
  • Noppadol Khaehintung, Theerayod Wiangtong, Phaophak Sirisuk, “FPGA Implementation of MPPT Using Variable Step-Size P&O Algorithm for PV Applications,” International Symposium on Communication and Information Technologies (ISCIT), 2006
  • Noppadol Khaehintung, Phaophak Sirisuk, Theerayod Wiangtong, “Control of Bifurcation for a Current-Mode DC/DC Boost Converter by Self-Inductor Current Feedback,” International Symposium on Communication and Information Technologies (ISCIT), 2006.
  • Theerayod Wiangtong, Prasoot Dejsuwan, “Unified Motor Controller Based on Space Vector Modulation Technique,” International Symposium on Circuits and Systems (ISCAS), 2006.
  • Panan Potipantong, Theerayod Wiangotng, Apisak Warapishet, Phaophak Sirisuk, “A Scaleable FFT/IFFT Kernel for Communication Systems using Codesign Approach,” Field Programmable Technology FPT, 2005.
  • Panan Potipantong, Theerayod Wiangtong, Apisak Warapishet, “A Scaleable FFT/IFFT Kernel for Communication Systems using Codesign Approach,” Electrical Engineering Conference (EECON-28), 2005.
  • Theerayod Wiangtong, Sirisak Leepokanon, “Hardware Accelerator for Object Tracking in Multi-camera Systems,” Electrical Engineering Conference (EECON-28), 2005.
  • Theerayod Wiangtong, Paiboon Thaninsurat, Prasoot Dejsuwan, “Universal High Speed Inverter Controller for AC Induction Motors,” Electrical Engineering Conference (EECON-28), 2005.
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “Hardware/Software Codesign Method for Reconfigurable Platforms”, Electrical Engineering Conference (EECON-26), 2003.
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk,” A Unified Codesign Run-time Environment for the UltraSONIC Reconfigurable Computer,” The International Conference on Field Programmable Logic and Applications (FPL), 2003.
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “ Cluster-Driven Hardware/Software Partitioning and Scheduling Approach For a Reconfigurable Computer System,” The International Conference on Field Programmable Logic and Applications (FPL), 2003.
  • Theerayod Wiangtong, Chung T. Ewe, Peter Cheung, “Multitasking in Hardware-Software Codesign for Reconfigurable Computer,” International Symposium on Circuits and Systems (ISCAS), 2003
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “SONICmole: A Debugging Environment for the UltraSONIC Reconfigurable Computer,” International Symposium on Circuits and Systems (ISCAS), 2003
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “Tabu Search with Intensification Strategy for Functional Partitioning and Scheduling in Hardware-Software Codesign,” The IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2002.
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “UltraSONIC: System Modelling and a Comparison,” ACM SIGDA UK, 2001.
  • Theerayod Wiangtong, Peter Cheung, Wayne Luk, “Comparing Three Heuristic Methods for Hardware-Software Partitioning and Scheduling,” International Symposium on Communication and Information Technologies 2001 (ISCIT), 2001.
  • Theerayod Wiangtong, Woranart Sangchai, “FPGAs Based IC Design for Inverter with Vector Modulation Technique,” International Symposium on Circuits and Systems (ISCAS), 2000.
  • Theerayod Wiangtong, Woranart Sangchai, “IGBT Inverter with Vector Modulation Technique Implemented on ALTERA FPGAs,” ISPAC’99, 1999.
  • Theerayod Wiangtong, Woranart Sangchai, “Using FPGAs for PWM signal with Vector Modulation Technique” Electrical Engineering Conference (EECON-22), 1999.
  • Theerayod Wiangtong, “LED Display Board Controller Using ALTERA FPGAs”, Electrical Engineering Conference (EECON-21), 1998
  • Theerayod Wiangtong , “Sine/Cosine Generator Implemented in HM coherent demodulator using ACTEL,” Electrical Engineering Conference (EECON-19), 1996.

Asst.Prof.Dr.Panavy Pookaiyaudom

  • Ph.D. : Electrical Engineering (Analogue IC Design),
    Imperial College of Science, Technology and Medicine, UK
  • B.Sc.: (Honours) in Electronics System Design, Oxford Brookes University, UK
  • E- mail : panavy@mut.ac.th        

Experiences

  • 2011-Present: Assistant President, Development planning and public relations, Mahanakorn University of Technology
  • 2011-Present: Director, Office of public relation and academic services, Mahanakorn University of Technology
  • 2012-Present: Director, Centre for Bioelectronics Integrated System (CBIT), Mahanakorn University of Technology
  • 2012-Present: Director, Applied Innovation Centre (AiCentre), Mahanakorn University of Technology
  • 2011-2012: Assistant Dean, Faculty of Engineering, MahanakornUniveristy of Technology
  • 2008-2010: Technical Support Officer, Health Sciences&Practice, King’s College, London
  • 2010-2011: Researcher, Centre for Bio-Inspired Technology, Imperial College, London
  • 2007-2010: Researcher, Institute of Biomedical Engineering, Imperial College, London
  • 2006-Present: Full time lecturer at electronic department, Mahanakorn University of Technology

Publications

  • P. Pookaiyaudom, et al., “A Generalized Floating-Gate Integrator for Sampled-Data Filtering Applications,” EECON35, 2012.
  • P. Pookaiyaudom, et al., “Towards an On-Chip Antenna Battery-less Glucose Monitor System in Standard CMOS,” EECON35, 2012.
  • P. Pookaiyaudom, et al., “Measurement of Cell and Bacterial Activity Using Array-Based ISFET Chemical Current-Conveyor in Weak-Inversion,” in Proc. IEEE 2012 International Symposium on Circuits and Systems, 2012.
  • P. Pookaiyaudom, et al., “Measurement of urea, creatinine and urea to creatinine ratio using enzyme based chemical current conveyor (CCCII+),” Sensors and Actuators B: Chemical, vol. 153, pp. 453-459, 2011.
  • S. Thanapitak, P. Pookaiyaudom, P. Seelanan, F. J. Lidgey, K. Hayatleh and C. Toumazou., “Verification of ISFET response time for millisecond range ion stimulus using electronic technique,” Electronics Letters, vol. 47, pp. 586-588, 2011.
  • P. Pookaiyaudom, et al., “Chemical current conveyor (CCCII+): System design and verification for buffer index/capacity measurement,” Sensors and Actuators B: Chemical, vol. 147, pp. 228-233, 2010.
  • P. Pookaiyaudom, C. Toumazou, and F.J. Lidgey, “Measurement of buffer index using the Chemical Current Conveyor (CCCII+),” in Analog Signal Processing 2008: Oxford Brookes University. pp. 15.1-15.6.
  • P. Pookaiyaudom, et al., “The chemical current-conveyor: a new microchip biosensor,” in Proc. IEEE 2008 International Symposium on,Circuits and Systems, 2008, pp. 3166-3169.

Asst.Prof.Dr. Xi Zhang

  • Ph.D: Computer Graphics for Nuclear Technology Applications,
    Tsinghua University, China
  • B.Eng: Electronic and Information Engineering,
    Huazhong University of Science &Technology
  • E- mail : xi.zhang.cn@gmail.com         

Experiences

  • Nov. 2010- May, 2013: Assistant Professor Hunan University, China
  • 2011 - 2013:  Project Investigator of the research for 3D visualization technology applied in cultural-heritage digitalization (Youth Research Funding, Hunan University)

PUBLICATIONS

  • X. Zhang and J. Liu, “Interactive 3D visualization of GPU-based volume rendering for air-cargo container CT inspection,” in Proc. 2013 International Electrical Engineering Congress, Chiangmai, Thailand, March 13-15, 2013.

  • X. Zhang and Chunyan Li, “Research universities do not forget education-oriented obligation,” in Proc. 2012 International Conference on Education Reform and Management Innovation (ERMI 2012), Shenzhen, China, December 4-5, 2012.

  • X. Zhang, et al, “Process for the 3D virtual reconstruction of a micro cultural heritage artifact obtained by synchrotron radiation CT technology using open source and free software,” Journal of Cultural Heritage, Vol. 13 (2012), p. 221-225

  • X. Zhang and J. Liu, “3D visualization design and implementation in 60Co container CT inspection system,” Nuclear Techniques, Vol. 34(8), 2011, p. 622-625.

  • X. Zhang and J. Liu, “Realization methods of 3D visualization in industrial Monolayer CT,” Nuclear Electronics & Detection Technology, Vol. 30(1), 2010, pp.1-4

  • X. Zhang and J. Liu, “Design and realization of 3D visualization for luggage and container CT inspection systems,” Nuclear Electronics & Detection Technology, Vol. 30(3), 2010.3, pp.308-311

  • X. Zhang and J. Liu, “3D visualization   in   industrial mono   layer   CT   inspection   system,” in Proc. 16th International conference on Nuclear Engineering (ICONE 16), Orlando, USA, May, 2008.

  • X. Zhang and J. Liu, “Design and application of data acquisition system in spiral CT,” Nuclear Electronics & Detection Technology, Vol. 27(5), 2007.

Scholarships & honors

  • 2008  Chinese Scholarship Council (CSC): European Visiting Research
      (Delft University of Technology, the Netherlands)  

  • 2008  Best Poster Award: The 16th International Conference on Nuclear Engineering,
    Orlando, USA

  • 2007  Guanghua Scholarship: Tsinghua University, China

  • 2006  Excellent Student Scholarship (3rd class): Tsinghua University, China

  • 2005  INET Excellent Student Scholarship: Tsinghua University, China
  • Asst.Prof.Dr.Chutham Sawigun

    • Ph.D. :Electrical Engineering (Nanopower Analog IC Design)
      Delft University of Technology, The Netherlands
    • M.Eng: Electrical Engineering (Electronics)
      Mahanakorn University of Technology, Thailand
    • B.Eng: Electrical Engineering (Power Electrical Engineering)
      Ubonrajathanee University, Thailand
    • E- mail : chutham@mut.ac.th        

    Experiences

    • March 2013-now: International Programme Director Mahanakorn University of Technology
    • May 2012 – now: Lecturer Department of Electronic Engineering, Faculty of Engineering, Mahanakorn University of Technology
    • December 2007 - May 2012: PhD Candidate Electronics Research Laboratory, Department of Microelectronics Faculty of Electrical Engineering, Mathematics and Computer Science, Delft University of Technology
    • November 2002 - December 2007: Lecturer Department of Electronic Engineering Mahanakorn University of Technology

    AWARDS

    • Best paper award: The 2005 International Conference on Electrical/Electronics, Computer, Telecommunication and Information Technology (ECTI2005)
    • Best paper award: The 35th Electrical Engineering Conference (EECON35)

    PROFESSIONAL ACTIVITIES

         Conference program committee:

    • International Conference on Biomedical Electronics and Devices 2012-2014 (Biodevices)
    • International Congress on Cardiovascular Technologies 2014 (CARDIOTECHNIX 2014)

         Regular reviewer for conferences and journal papers:

    • International Conference on Biomedical Electronics and Devices (Biodevices)
    • IEEE Biomedical Circuits and Systems Conference (BioCAS)
    • IEEE International symposium on Circuits and Systems (ISCAS)
    • Analog Integrated Circuits and Signal Processing: An International Journal
    • Elsevier Microelectronics Journal (MEJ)
    • IET Journal of Circuits, Devices and Systems
    • IEEE Transaction on Circuits and Systems I & II
    • IEEE Journal of Solid-State Circuits (JSSC)

    SELECTED PUBLICATIONS

         Journal

    • C. Sawigun, W. Ngamkham, W. A. Serdijn, “A 0.5-V, 2-nW, 55-dB DR, fourth-order bandpass filter using single branch biquads: an efficient design for FoM enhancement,” Microelectronics Journal, Available online 23 January 2014, ISSN 0026-2692, http://dx.doi.org/10.1016/j.mejo.2014.01.002.

    • C. Sawigun, A. Demosthenous, X. Liu and W. A. Serdijn, “A Compact Rail-to-Rail Class-AB CMOS Buffer With Slew-Rate Enhancement,” IEEE Transactions on Circuits and Systems-II: Express Briefs, vol. 59, vo. 8, August 2012, pp. 486 -- 490.

    • C. Sawigun and W. A. Serdijn, “Analysis and design of a low-voltage, low-power, high-precision, class-AB current-mode subthreshold CMOS sample and hold circuit,” IEEE Tran. Cir and Systs-I: Regular Papers, vol. 58, no. 7, 2011.

    • C. Sawigun and W. A. Serdijn, “Ultra low-power, class-AB, CMOS four-quadrant current multiplier,” IET Electronics Letters, vol. 45, no. 10, 2009.

    • C. Sawigun and W. A. Serdijn, “Low-voltage, low-power, low switching error, class-AB switched current memory cell,” IET Electronics Letters, vol. 44, no. 12, 2008.

    • C. Sawigun and W. A. Serdijn, “0.75 V micro-power SI memory cell with feedthrough error reduction,” IET Electronics Letters, vol. 44, no. 9, 2008.

    • C. Sawigun and A. Demosthenous, “Compact low-voltage four-quadrant analogue multiplier,” IEE Electronics letters, vol. 42, no. 20, pp. 1149-1151, 2006.

    Conference

    • C. Sawigun and W. A. Serdijn, “A modular transconductance reduction technique for very low-frequency Gm-C filters,” in Proc. IEEE ISCAS, Seoul, South Korea, May 20 -- 23, 2012, pp. 1183 -- 1186.

    • C. Sawigun, W. Ngamkham and W. A. Serdijn, “A 2.6 nW, 0.5 V, 52 dB-DR, 4th order Gm-C BPF: Moving closer to the FoM’s fundamental limit,” in Proc. IEEE ISCAS, Seoul, South Korea, May 20 -- 23, 2012, pp. 656 -- 659.

    • C. Sawigun, W. Ngamkham, M. van Dongen and W. A. Serdijn, “A least-voltage drop high output resistance current source for neural stimulation,” Proc. IEEE BioCAS, Paphos, Cyprus, Nov. 3 -- 5, 2010.

    • C. Sawigun, W. Ngamkham, and W. A. Serdijn’ “An ultra-low-power peak-instant detector for a peak picking cochlear implant processor,”  in Proc. IEEE BioCAS, Paphos, Cyprus, Nov. 3 -- 5, 2010.

    • C. Sawigun, W. Ngamkham, and W. A. Serdijn, “Comparison of speech processing strategies for the design of an ultra-low-power analog bionic ear,” in Proc. IEEE EMBC, Buenos Aires, Argentina, pp. 1374-1377, August, 2010.

    • C. Sawigun, D. Pal and A. Demosthenous, “A wide-input linear range subthreshold transconductor for sub-Hz filtering,” in Proc. IEEE ISCAS, pp.1567-1570, Paris, France May 30 2010-June 2 2010.

    • C. Sawigun and W. A. Serdijn, “A nano-power class-AB current multiplier for energy-based action potential detector,” in Proc. European Conference on Circuit Theory and Design (ECCTD), Aug. 2009, pp.417-420, 23-27.

    • C. Sawigun, M. Grashuis, R. Peeters and W. A. Serdijn, “Nanopower sampled data wavelet filter design using Switched Gain Cell technique,” in Proc. IEEE ISCAS, pp.545-548, 24-27 May 2009.

    • C. Sawigunand J. Mahattanakul, “A 1.5 V, wide-input range, high-bandwidth, CMOS four-quadrant analog multiplier,” in Proc. ISCAS 2008, pp. 2318-2321, Seattle, USA, 18-21 May 2008.

    • C. Sawigun, A. Demosthenous, and D. Pal, “A low-voltage, low-power, high-linearity CMOS four-quadrant analog multiplier,” in Proc. ECCTD2007, Sevilla, Spain, pp.751-754, 2007.

    • C. Sawigun, J. Mahattanakul, A. Demosthenous,  and D. Pal, “A low-power, CMOS analog Voltage buffer using compact adaptive biasing,” in Proc. ECCTD2007, Sevilla, Spain, pp.1-4, 2007.

    • C. Sawigun and J. Mahattanakul, “A compact high current efficiency low-voltage MOS transconductor with nearly constant input voltage range,” in Proc. IEEE ISCAS2007, New Orleans, USA, pp. 221-224, 2007.

    • C. Sawigun and J. Mahattanakul, “A low-voltage CMOS linear transconductor suitable for analog multiplier application,” in Proc. IEEE ISCAS, Kos, Greece, pp.1543-1546, 2006.

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    140 Cheumsampan Rd, Nongchok, Bangkok, Thailand 10530
    Tel. +66 (0) 2988-3655, +66 (0) 2988-3656
    Email: inter@mut.ac.th
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